[Pc_Support] ViA C3 for IPCop? Yes/no? -- ALU v. FPU usage ...

[Bryan J. Smith]

[ Hmmm, my original post didn't make it to the list? ]

William Warren wrote:
> FPU is hammered due to the packet analysis of snort.  Also the data
> analysis Dansguardian does is also very FPU intensive.  As i said squid
> isn't cpu intensive at all..the other two(dansguardian and snort) are
> highly fpu intensive.

I don't see how/why the FPU would ever be used at all?  I don't see
any floating point need at all, and it would be a lot slower than
integer.  In fact, the software wouldn't run at all (or require
software emulation) on virtually all microcontrollers -- even Intel's
XScale IXP (communication I/O processors).

The only remote usage I see is to leverage some integer SSE
instructions using the 128-bit XMM registers of the Athlon XP and
later units, which are microcoded to leverage its 3-issue FPU.  Intel
processors (at least P3/P4) have dedicated SSE pipes for such.  Nearly
all, 45 of 47 instructions, of MMX do integer transforms as well.

The only legacy FPU hack I know of was for the defective ALU load in
the original, 2-issue ALU of the original Pentium.  Pentium Pro
on-ward corrected that (and was largely a completely different design
from the Pentium).

So this doesn't make sense at all.  I guess I should look at the code
to see for myself -- possibly disassemble to ensure no FPU opcodes are
used at all.  I bet it's only limited, integer MMX/SSE.