[Pc_Support] Bus Bottleneck Crash, No Bandwidth Left?

[Bryan J. Smith]

On Mon, 2006-02-20 at 21:27 -0500, Derek Konigsberg wrote:
> Or, they're called "you didn't buy a PC, and got a machine with multiple PCI 
> busses plugged into a crossbar interconnect" :-)
> (assuming pre-HyperTransport days, of course)

No, that's Intel marketing.
The Memory Controller Hub (MCH) is a hub.
Despite Intel's marketing, it's not a switch.

Everything is a bridged 32-bit or 64-bit PCI bus from that -- AGP (built
into MCH), ESB, ICH, etc...

ServerWorks' Intel P3/P4 designs are 2-4 chips.  There are 1-3 "Inter
Module Bus" (IMB) chips that bridge between each other and then 1 "South
Bridge" with a Thin-IMB.

Or were you referring to Athlon/MP with a 4-5 node EV6 crossbar?

> Speaking of this subject area, anyone know if the limited IRQ stupidity has 
> gone away with newer EFI-based machines (such the new MacTel boxes)?
> (yes, I know about IRQ sharing, but it still feels like an ugly hack, like the 
> BIOS, and most of what has been needed to maintain x86 legacy compatability 
> on modern x86 machines)

Why would it go away?

You _still_ need to emulate a pair of legacy 8259 Interrupt controllers.
_How_ you do it is dependent on the architecture.

Intel still virtually uses the same, legacy PC/AT logic at its MCH with
the Gunning Transistor Logic (GTL) design.  Now Intel offers Advanced
Programmable Interrupt Controllers (APIC) to deal with more and more
system devices, interrupts between processors, etc..., but it still
seems like a major hack.

AMD _kicked_ the legacy GTL bus _off_ the board with EV6 Athlon/MP.
Although this is only an assumption, I believe EV6 is still the
interconnect inside of A64/Opteron.  In _any_ case, legacy 8259/GTL
interrupts are completely virtualized over EV6/HyperTransport, and
extremely well tamed -- all while emulating an Intel APIC.

Case-in-point:  I _never_ had interrupt issues on Athlon or later.  I
cannot say the same for Intel, not even Socket-603/604 or LGA-775.

About the only thing I ever have an issue on AMD platform is when I have
7+ buses like with the nFPro2200+nFPro2050+AMD813x combination.  I can
run into an install-time BIOS v. Linux PCI enumeration issue, because
the OS never expects that many buses on a true Intel platform (because
it's impossible).  Newer BIOSes or Linux kernel patches the issue
though.


-- 
Bryan J. Smith             Professional, technical annoyance
mailto:b.j.smith at ieee.org       http://thebs413.blogspot.com
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****** Speed doesn't kill.  Difference in speed does! ******